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 INTEGRATED CIRCUITS
74LV4060 14-stage binary ripple counter with oscillator
Product specification 1998 Jun 23
Philips Semiconductors
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
FEATURES
* Wide operating voltage: 1.0 to 5.5 V * Optimized for Low Voltage applications: 1.0 to 3.6 V * Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V * Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, * Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb
= 25C. Tamb = 25C.
APPLICATIONS
* Control Counters * Timers * Frequency Dividers * Time-delay circuits
DESCRIPTION
The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT4060. The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions.
* All active components on chip * RC or crystal oscillator configuration * Output capability: standard (except for RTC and CTC) * ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25C; tr = tf < 2.5 ns SYMBOL PARAMETER Propagation delay RS to Q3 tPHL/tPLH tPHL fmax C1 CPD Qn to Qn+1 MR to Qn Maximum clock frequency Input capacitance Power dissipation capacitance per package Notes 1, 2 and 3 CONDITIONS CL = 15 pF VCC = 3.3 V 29 6 16 99 3.5 40 MHz pF pF ns TYPICAL UNIT
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in mW) PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of the outputs. 2. The condition is V1 = GND to VCC 3. For formula on dynamic power dissipation, see the following pages.
ORDERING INFORMATION
PACKAGES 16-Pin Plastic DIL 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C OUTSIDE NORTH AMERICA 74LV4060 N 74LV4060 D 74LV4060 DB 74LV4060 PW NORTH AMERICA 74LV4060 N 74LV4060 D 74LV4060 DB 74LV4060PW DH PKG. DWG. # SOT38-4 SOT109-1 SOT338-1 SOT403-1
1998 Jun 23
2
853-2076 19619
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
PIN DESCRIPTION
PIN NO. 1, 2, 3 7, 5, 4, 6, 15, 13, 15 8 9 10 11 12 16 SYMBOL Q11 to Q13 Q3 to Q9 GND CTC RTC RS MR VCC FUNCTION Counter outputs Counter outputs Ground (0 V) External capacitor connection External resistor connection Clock input/oscillator pin Master reset Positive supply voltage
LOGIC SYMBOL
10 9
RTC CTC 11 RS 12 MR Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3
PIN CONFIGURATION
SV00307
Q11 Q12 Q13 Q5 Q4 Q6 Q3 GND 1 2 3 4 5 6 7 16 15 14 13 12 11 10 9 VCC Q9 Q7 Q8 MR RS RTC CTC
8
SV00308
LOGIC SYMBOL (IEEE/IEC)
CTR14 3 9 10 11 12 CT CT = 0 9 11 CX RX RCX !G + 7 5 4 6 14 13 15 1 2 13 (a) 3 11 12 &
CTR14 3 7 5 4 6 + CT CT = 0 9 11 14 13 15 1 2 13 (b) 3
SV00311
1998 Jun 23
3
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
DYNAMIC POWER DISSIPATION
GND = 0 V; Tamb = 25 _C PARAMETER Total dynamic power dissipation when using the on-chip oscillator (PD) VCC (V) 1.2 2.0 3.0 TYPICAL FORMULA FOR PD (mW)1 CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 16 x VCC CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 460 x VCC CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 1000 x VCC
NOTE: 1. Where: fo = output frequency in MHz; fosc = oscillator frequency in MHz; S (CL x VCC2 x fo) = sum of the outputs; CL = output load capacitance in pF; Ct = timing capacitance in pF; VCC = supply voltage in V.
FUNCTIONAL DIAGRAM
10 RTC 9 CTC
11
RS
CP 14-stage binary counter CD
12
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
7
5
4
6
14
13
15
1
2
3
SV00312
LOGIC DIAGRAM
CTC RTC RS CP Q CD FF1 FF4 FF10 FF12 FF14
MR
Q3
Q9
Q11
Q13
SV00313
1998 Jun 23
4
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
TIMING DIAGRAM
1 RS
2
4
8
16
32
64
128
256
512
1.024
2.048
4.096
8.192
16.384
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
SV00309
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK IOK IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current - standard outputs DC VCC or GND current for types with -standard outputs Storage temperature range Power dissipation per package -plastic DIL -plastic mini-pack (SO) -plastic shrink mini-pack (SSOP and TSSOP) for temperature range: -40 to +125C above +70C derate linearly with 12mW/K above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI < -0.5 or VI > VCC + 0.5V VO < -0.5 or VO > VCC + 0.5V -0.5V < VO < VCC + 0.5V CONDITIONS RATING -0.5 to +7.0 20 50 25 50 -65 to +150 750 500 400 UNIT V mA mA mA mA C mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jun 23
5
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb Input voltage Output voltage Operating ambient temperature range in free air Input rise and fall times See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V PARAMETER DC supply voltage CONDITIONS See Note1 MIN 1.0 0 0 -40 -40 - - - - - - - - TYP. 3.3 - - MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V C
tr, tf
ns/V
NOTES: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
DC CHARACTERISTICS
Over operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2V VIH HIGH level Input voltage MR input VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5V VCC = 1.2V VIL LOW level Input voltage MR input VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5 VCC = 1.2V VIH HIGH level Input voltage RS input VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5V VCC = 1.2V VIL LOW level Input voltage RS input VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5 VCC = 1.2V; RS = GND and MR = GND; -IO = 3.4mA VCC = 2.0V; RS = GND and MR = GND; -IO = 3.4mA VCC = 2.7V; RS = GND and MR = GND; -IO = 3.4mA VCC = 3.0V; RS = GND and MR = GND; -IO = 3.4mA VCC = 4.5V; RS = GND and MR = GND; -IO = 3.4mA 0.9 1.4 2.0 0.7 * VCC - - - - 1.0 1.6 2.4 0.8 * VCC - - - - - - - 2.40 - -40C to +85C TYP1 - - - - - - - - - - - - - - - - -
-
-40C to +125C MIN 0.9 1.4 2.0 0.7 * VCC - - - - 1.0 1.6 2.4 0.8 * VCC - - - - - - - 2.20 - MAX - - - - 0.3 0.6 0.8 0.3 * VCC - - - - 0.2 0.4 0.5 0.2 * VCC - - - - - - - - - 0.3 0.6 0.8
UNIT
MAX
V
V
0.3 * VCC - - - - 0.2 0.4 0.5 0.2 * VCC - - - - -
V
V
VOH
HIGH level output voltage; RTC output out ut
- 2.82 -
V
1998 Jun 23
6
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
LIMITS SYMBOL PARAMETER TEST CONDITIONS VCC = 1.2V; RS = VCC and MR = VCC; -IO = 0.8mA VCC = 2.0V; RS = VCC and MR = VCC; -IO = 0.8mA VCC = 2.7V; RS = VCC and MR = VCC; -IO = 0.8mA VCC = 3.0V; RS = VCC and MR = VCC; -IO = 0.8mA VCC = 4.5V; RS = VCC and MR = VCC; -IO = 0.8mA VCC = 1.2V; RS = GND and MR = GND; -IO = 100A VCC = 2.0V; RS = GND and MR = GND; -IO = 100A VCC = 2.7V; RS = GND and MR = GND; -IO = 100A VCC = 3.0V; RS = GND and MR = GND; -IO = 100A VCC = 4.5V; RS = GND and MR = GND; -IO = 100A VCC = 1.2V; RS = VCC and MR = VCC; -IO = 100A VCC = 2.0V; RS = VCC and MR = VCC; -IO = 100A VCC = 2.7V; RS = VCC and MR = VCC; -IO = 100A VCC = 3.0V; RS = VCC and MR = VCC; -IO = 100A VCC = 4.5V; RS = VCC and MR = VCC; -IO = 100A VCC = 1.2V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 2.0V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 2.7V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 3.0V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 4.5V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 1.2V; VI = VIH and VI = VIL; -IO = 100A VCC = 2.0V; VI = VIH and VI = VIL; -IO = 100A VCC = 2.7V; VI = VIH and VI = VIL; -IO = 100A VCC = 3.0V; VI = VIH and VI = VIL; -IO = 100A VCC = 4.5V; VI = VIH and VI = VIL; -IO = 100A - - 2.40 - 1.0 1.8 - 2.8 - - - - 2.40 - 1.0 1.8 - 2.8 - 1.0 1.8 - 2.8 - -40C to +85C - - - 2.82 - 1.2 2.0 - 3.0 - 1.2 2.0 - 3.0 - 1.2 - - 2.82 - 1.2 2.0 - 3.0 - - - - - - - - - - - - - - - - - - - - - - - - - - -40C to +125C - - - 2.20 - 1.0 1.8 - 2.8 - 1.0 1.8 - 2.8 - - - - 2.20 - 1.0 1.8 - 2.8 - - - - - - - - - - - - - - - - - - - - - - - - - - V V V V V UNIT
VOH
HIGH level output voltage; RTC output out ut
VOH
HIGH level output voltage; out ut RTC output
VOH
HIGH level output voltage; RTC output out ut
VOH
HIGH level output voltage; CTC output out ut
VOH
HIGH level output voltage; exce t except RTC output out ut
1998 Jun 23
7
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
LIMITS SYMBOL PARAMETER TEST CONDITIONS VCC = 1.2V; VI = VIH and VI = VIL; -IO = 6mA HIGH level output out ut voltage; except RTC and CTC outputs tt VCC = 2.0V; VI = VIH and VI = VIL; -IO = 6mA VCC = 2.7V; VI = VIH and VI = VIL; -IO = 6mA VCC = 3.0V; VI = VIH and VI = VIL; -IO = 6mA VCC = 4.5V; VI = VIH and VI = VIL; -IO = 6mA VCC = 1.2V; RS = VCC and MR = GND; -IO = 3.4mA VCC = 2.0V; RS = VCC and MR = GND; -IO = 3.4mA VCC = 2.7V; RS = VCC and MR = GND; -IO = 3.4mA VCC = 3.0V; RS = VCC and MR = GND; -IO = 3.4mA VCC = 4.5V; RS = VCC and MR = GND; -IO = 3.4mA VCC = 1.2V; RS = VCC and MR = GND; -IO = 100A VCC = 2.0V; RS = VCC and MR = GND; -IO = 100A VCC = 2.7V; RS = VCC and MR = GND; -IO = 100A VCC = 3.0V; RS = VCC and MR = GND; -IO = 100A VCC = 4.5V; RS = VCC and MR = GND; -IO = 100A VCC = 1.2V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 2.0V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 2.7V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 3.0V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 4.5V; RS = VIH and MR = VIL; -IO = 3.8mA VCC = 1.2V; VI = VIH and VI = VIL; -IO = 100A VCC = 2.0V; VI = VIH and VI = VIL; -IO = 100A VCC = 2.7V; VI = VIH and VI = VIL; -IO = 100A VCC = 3.0V; VI = VIH and VI = VIL; -IO = 100A VCC = 4.5V; VI = VIH and VI = VIL; -IO = 100A - - - 2.40 - - - - - - - - - - - - - - - - - - - - - -40C to +85C -
-
-40C to +125C - - - - - - - - 0.40 - 0.2 0.2 - 0.2 - - - - 0.40 - 0.2 0.2 - 0.2 - - - - 2.20 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 - 0.2 0.2 - 0.2 - - - - 0.50 - 0.2 0.2 - 0.2 -
UNIT
VOH
- 2.82 - -
-
V
V
VOL
LOW level output voltage; out ut RTC output
- 0.25 - 0 0 - 0 - -
-
V V
VOL
LOW level output voltage; RTC output out ut
V
VOL
LOW level output voltage; CTC output out ut
- 0.25 - 0 0 - 0 -
V
VOL
LOW level output voltage; exce t except RTC output out ut
V
1998 Jun 23
8
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
LIMITS SYMBOL PARAMETER TEST CONDITIONS VCC = 1.2V; VI = VIH and VI = VIL; -IO = 6mA HIGH level output out ut voltage; except RTC and CTC outputs tt VCC = 2.0V; VI = VIH and VI = VIL; -IO = 6mA VCC = 2.7V; VI = VIH and VI = VIL; -IO = 6mA VCC = 3.0V; VI = VIH and VI = VIL; -IO = 6mA VCC = 4.5V; VI = VIH and VI = VIL; -IO = 6mA II Input leakage current Quiescent supply current Quiescent supply current Additional quiescent supply current per input pin VCC = 5.5V; VI = VCC or GND VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 5.5V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC -0.6V; IO = 0 - - - - - - - - -40C to +85C -
-
-40C to +125C - - 0.40 - - 1.0 20 - - - - - - - - - - - 0.50 - - 1.0 160
UNIT
VOL
0.25 - - - - -
V
A
ICC
A 80
ICC
-
-
500
-
850
A
NOTE: 1. All typical values are measured at Tamb = 25C.
AC CHARACTERISTICS
GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = 500 SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 2.0 tPHL/tPLH Propagation delay RS to Q3 Figures, 6, 8 2.7 3.0 to 3.6 4.5 to 5.5 1.2 2.0 tPHL/tPLH Propagation delay Qn to Qn+1 Figures 7, 8 2.7 3.0 to 3.6 4.5 to 5.5 1.2 2.0 tPHL Propagation delay MR to Qn Figures 7, 8 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Clock pulse width RS; HIGH or LOW Figure 6 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Master reset pulse width MR; HIGH Figure 7 2.7 3.0 to 3.6 4.5 to 5.5 MIN - - - - - - - - - - - - - - - 34 25 20 16 34 25 20 16 LIMITS -40 to +85 C TYP1 180 52 42 332 24 40 14 10 82 6 100 29 24 192 14 9 6 5 4 10 8 6 4 MAX - 84 66 53 39 - 23 16 13 9 - 46 39 31 23 - - - - - - - - LIMITS -40 to +125 C MIN - - - - - - - - - - - - - - - 38 30 24 20 38 30 24 20 MAX - 105 83 66 49 - 29 20 16 11 - 58 49 39 29 - - - - - - - - ns ns ns ns ns UNIT
1998 Jun 23
9
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
SYMBOL
PARAMETER
WAVEFORM
CONDITION VCC(V) 2.0 MIN 29 26 18 12 14 19 24 30
LIMITS -40 to +85 C TYP1 18 16 11 7 40 70 90 100 MAX - - - - - - - -
LIMITS -40 to +125 C MIN 37 32 23 15 9 12 15 19 MAX - - - - - - - -
UNIT
trem
Removal time MR to RS
Figure 7
2.7 3.0 to 3.6 4.5 to 5.5 2.0
ns
fmax
Maximum clock pulse frequency
Figure 6
2.7 3.0 to 3.6 4.5 to 5.5
MHz
NOTE: Unless otherwise stated, all typical values are at Tamb = 25C. 1. Typical value measured at VCC = 3.3V. 2. Typical value measured at VCC = 5.0V.
Rbias = 560 kW
VCC gfs (mA/V) 0.47 mF input output 100 mF
20
15
Vi ~ (f = 1 kHz)
A io ~ 10
GND
SV00323
Figure 1. Test set-up for measuring forward transconductance gfs = dio/dvi at vo is constant (see also graph Figure 2); MR = LOW.
5
0 0 1 2 3 VCC (V) 4
SV00324
Figure 2. Typical forward transconductance gfs as a function of the supply voltage VCC at Tamb = 25C.
1998 Jun 23
10
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
105
11
C2
R2
Figure 3. Example of an RC oscillator. Typical formula for oscillator frequency: 1 f OSC + 2.5 x R t x C t
TIMING COMPONENTS LIMITATIONS
The oscillator frequency is mainly determined by Rt . Ct, provided R2 2Rt and R2 . C2 % Rt . Ct. The function of R2 is to minimize the influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance C2 should be kept as small as possible. In consideration of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the 'ON' resistance in series with it, which typically is 280 W at VCC = 1.2 V, 130 W at VCC = 2.0 V and 100 W at VCC 3.0 V. The recommended values for these components to maintain agreement with the typical oscillation formula are: Ct > 50pF, up to any practical value, 10 kW < Rt < 1 MW. In order to avoid start-up problems, Rt > 1 kW.
1998 Jun 23
IIIII IIIII
MR (from logic) RS
fosc (Hz)
104
RTC 10
CTC 9 103
Rt
Ct
102
SV00732
10 103 10-4 104 10-3 105 Rt (W) 106
10-2 Ct (mF) 10-1
SV00328
Figure 4. RC oscillator frequency as a function of Rt and Ct at VCC = 1.2 to 3.6 V; Tamb = 25C. Ct curve at Rt = 100 kW; R2 = 200 kW. Rt curve at Ct = 1 nF; R2 = 2 x Rt.
11
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
VI MR (from logic) MR INPUT GND tW trem RTC 10 Rbias 100 kW to 1 MW VI RS INPUT GND tPHL VCC Qn OUTPUT R2 2.2 kW GND VM VM VM
11 RS
SV00329
C3
22 to 37 pF
C2
100 pF
Figure 7. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (RS) removal time.
VOH Qn OUTPUT VOL tPLH VOH Qn+1 OUTPUT VOL VM tPHL VM
SV00326
Figure 5. External components connection for a typical crystal oscillator R2 is the power limiting resistor. For starting and maintaining oscillation, a minimum transconductance is necessary, so R2 should not be too large. A practical value for R2 is 2.2 kW.
SV00327
1/fmax VI CP INPUT GND tW tPHL VOH Qn OUTPUT VOL VM tPLH VM
Figure 8. Waveforms showing the output Qn to output n + 1 propagation delays. NOTES: 1. VM = 1.5 V at VCC > 2.7 V and < 3.6 V VM = 0.5 . VCC at VCC < 2.7 V and > 4.5 V. 2. VOL and VOH are the typical output voltage drop that occur with the output load.
SV00322
Figure 6. Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency.
1998 Jun 23
12
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
TEST CIRCUIT
tW 90% VM 10% tTHL (tf) tTLH (tr) CL 100pF RL = 1k POSITIVE PULSE 10% 90% VM tW 90% VM 10% 0V 10% 0V tTLH (tr) tTHL (tf) VI VM VI
Vcc
S1
2 < VCC
Open GND
90% NEGATIVE PULSE
Vl PULSE GENERATOR RT D.U.T.
VO
RL = 1k
Test Circuit for Outputs
VM = 1.5V Input Pulse Definition
SWITCH POSITION
TEST tPLH/tPHL S1 Open VCC < 2.7V 2.7-3.6V 4.5 V VI VCC 2.7V VCC
DEFINITIONS
RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00910
Figure 9. Load circuitry for switching times.
1998 Jun 23
13
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
1998 Jun 23
14
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1998 Jun 23
15
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
1998 Jun 23
16
Philips Semiconductors
Product specification
14-stage binary ripple counter with oscillator
74LV4060
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
1998 Jun 23
17
Philips Semiconductors
Product specification
14-stage bunary ripple counter with oscillator
74LV4060
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 08-98 9397-750-04658
Philips Semiconductors
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